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\f2\fs20\lang1031 {\fs16\up6\lang2057 $}{\lang2057  USB2LPT: Inhalt}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang2057 +}{\lang2057  A}}{\plain \b\f2\cf11\lang1031 USB2LPT}{\plain \b\f2\cf11\lang1031 
\par }This is the help file for h#s USB to Parallel converter.
\par The USB2LPT device and its driver enables redirecting of port access by random application software to a USB-attached parallel port, i.e. emulating a parallel port via USB. This unique solution works on all USB supporting Windows operating systems; the su
pport for AMD64 platforms is currently in progress.
\par \pard \ri193\sa120\brdrb\brdrs\brdrw15\brsp100 {\i haftmann#software, }{\i November 15. 2009}{\i 
\par }\pard \sa120 This file merely contains {\b\cf10 c}{\b\cf10 ontext help }for three property sheet pages of {\b\cf10 Device }{\b\cf10 Manager }and is {\i not }intended to read sequencially.
\par For more information, documents and updates see {\b\cf2 http://www.tu-chemnitz.de/~heha/bastelecke/Rund um den PC/USB2LPT/}{\b\cf2 index.html.en}
\par \pard \fi-708\li851\tx851 {\b\cf14 Hint:}{\b\cf14 \tab }While using Device Manager, use the context help function, or press {\b\cf10 F1 }on focused dialog control!
\par \pard \sa120 \page ${\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang2057 $}{\lang2057  Emulation}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang2057 +}{\lang2057  A}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang2057 #}{\lang2057  100_0}}{\b\cf11 Emulation: }The magic of {\b\cf12 USB2LPT}, merely, its driver, is redirecting I/O instructions contained in {\i random application software}{\i  }to USB.
\par Some details can be changed on this property sheet.
\par \pard \fi-708\li851\tx851 {\b\cf14 Hint:}{\b\cf14 \tab }While using Device Manager, use the context help function, or press {\b\cf10 F1 }on focused dialog control!
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang2057 #}{\lang2057  100_100}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang2057 +}{\lang2057  A}}{\b\cf11 Port address: }
Choose the address to be emulated. You may hide a real address too, this will deactivate the present port.
\par \pard \fi-851\li993\sa120\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }one of {\b\cf10 LPT}{\b\i\cf10 x} ({\i x} = 1 to 3)
\par \pard \sa120 You can alse enter an {\b\cf10 arbitrary address }(decimal or hexadecimal).\line 
{\f5\fs32\cf13 M}{\cf13  }{\b\cf13 Attention! }{\b\i\cf13 You should know the conequence of your doing! You m}{\b\i\cf13 
ay hide (and redirect) port addresses of your network card, video card, or hard disk, this will probably crash your computer or worse.}\line 
An arbitrary address is the only solution to have more than 3 parallel ports on your computer. Moreover, y
our application software must have a possibility to use an arbitrary port address.
\par \pard \fi-708\li851\tx851 {\b\cf14 Hin}{\b\cf14 t:}{\b\cf14 \tab }The {\b\cf12 LPT}{\b\cf12  port name }shown is usual but completely irrelevant. A couple of {\i application software }uses the same assignment between {\b\cf12 LPT}{\b\cf12  port name }
and its {\b\cf12 address}; some other software detect a valid name and guesses its address by some weird magic. For the latter case, you should refer to the {\b\cf12 LPT}{\b\cf12  port name }shown in the \'93Port settings\'94 tab.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang2057 #}{\lang2057  100_102}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang2057 +}{\lang2057  A}}{\b\cf11 LPT extension: }
Besides well-known functionality of a parallel port consisting of 12 (digital) outputs and 5 inputs, a modern port can more, especially streaming 8-bit parallel data in both directions with hardware support. The two new (incompatible but co-existing) prot
ocols are called {\b ECP }and {\b EPP }extension and need some additional port addresses. The traditional port (occupying only 3 contiguous addresses) is called {\b SPP}
. This converter and this driver emulates all of these extensions if needed. However, most programs don't need extensions.
\par \pard \fi-851\li993\sa120\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 SPP} (extended modes only if your application software explicitely requires)
\par \pard {\fs16 The }{\b\fs16 EPP }{\fs16 addresses are at base address +3..+7, the }{\b\fs16 ECP }{\fs16 addresses at base address +400h..403h. For more information, see}{\fs16  other sources, like }{\b\fs16\cf2 www.beyondlogic.org}{\b\fs16\cf2  }{\fs16 or 
}{\b\fs16\cf2 msdn}{\b\fs16\cf2 .microsoft.com}{\fs16 .}
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  100_10}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  100_17}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 #}{\lang1040  100_11}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Trapping method: }The reason fo
r problems having a parallel port onto USB is the missing Windows API for handling a parallel port at high level. Therefore, programmers had to program some non-standardized sort of low-level port access in their application software. This converter (more
 specifically, the driver) grabs them all and redirects them to the USB.\line 
Trapping of a set of kernel library functions like {\b\cf10 READ_PORT_UCHAR/WRITE_PORT_UCHAR }is by far the obvious way to achieve this, but will not always work.\line 

The other way is trapping I/O access using {\b\cf10 debug registers}
, this will catch all (hard-coded) accesses both in user (either V86 or protected mode) and kernel mode. But debug registers are a limited, Pentium-processor-bound, system-shared resource with problems on multi-core machines.
\par \pard \fi-851\li993\sa120\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 Both schwitches ON, but please leave debug registers OFF on multi-core machines}\line 
{\i The }{\i \'93}{\i softer}{\i \'94}{\i 
 redirection will be preferred automatically by desig}{\i n.}
\par \pard {\fs16 On}{\fs16  AMD64 platform, support for READ_PORT_UCHAR alike functions are dropped, therefore, redirecting of kernel library functions is not available.}
\par {\fs16 On Windows 98/Me, an additional trap using Input Output Permission Map (IOPM) will be used in parallel to READ_PORT_UCHAR alike function redirecting}{\fs16  and not counted separately}{\fs16 .}
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  100_12}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  100_101}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 #}{\lang1040  100_13}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  100_103}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Performance Options: }
A USB transfer lasts 125\~\'b5s (High-Speed). But an I/O access takes about 1\~\'b5s. Without some sort of cacheing, application software will notably slows down.
\par {\b\cf10 Output instructions }can be cached and sent \'93en bloc\'94 via USB to the USB2LPT converter. You can enter a maximum write delay.\line 
{\b Note: }Every {\i input instruction }
tends to write out the collected output instructions to preserve order.
\par \pard \fi-851\li993\sa120\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 switched ON, 200..500 ms}\line 
{\i Exceptions are high-speed output-only devices, like stepper motors or D/A converters; you should try no cache or very short delays.}

\par \pard \sa120 At {\b\cf10 input instructions}, no cacheing is possible because program logic depends on bits read. Some thumb programs read ouput-only ports back; in this case, USBLPT can present the last data output. However, some peripherals
 can pull-down intentionally output-only lines.
\par \pard \fi-851\li993\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 switched ON}\line 
{\i Should work for most }{\i peripherals}{\i . If it doesn't work, or you know your }{\i p}{\i eripheral}{\i , do the particular switch OFF.}
\par \pard \sa120 \page ${\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 $}{\lang1040  Statistik}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_0}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Statistics: }This page shows counts of accesses and redirections. So you can see how USB2LPT works.
\par {\fs16 On}{\fs16  AMD64 platform, support for READ_PORT_UCHAR alike functions are dropped, therefore, these counters will never count.}
\par Moreover, the usage of debug registers is shown.
\par And you have access to a USB2LPT specific Extra Register and can make a Firmware Update.
\par \pard \fi-708\li851\tx851 {\b\cf14 Hint:}{\b\cf14 \tab }While using Device Manager, use the context help function, or press {\b\cf10 F1 }on focused dialog control!
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_100}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_101}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 #}{\lang1040  101_104}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_105}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 IN}{\b\cf11 
 or OUT instructions: }These counters count the port accesses made by application software.
\par \pard While OUT instructions are generally cached and therefore emulated with almost no latency, IN instructions have about 125\~\'b5s, at USB Low-Speed even 1\~ms (currently, on Vista or Windows 7, even 8\~ms) latency!
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_102}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Emulati}{\b\cf11 on errors: }
Counts some complicated and rarely used I/O instructions and kernel functions, like READ_PORT_BUFFER_UCHAR; WRITE_PORT_BUFFER_UCHAR; READ_PORT_BUFFER_USHORT; WRITE_PORT_BUFFER_USHORT; READ_PORT_BUFFER_ULONG; WRITE_PORT_BUFFER_ULONG; (rep)\~insb; (rep)\~
outsb; (rep)\~insw; (rep)\~outsw; (rep)\~insd; (rep)\~outsd.
\par \pard These functions are currently not emulated.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_103}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Stolen}{\b\cf11  Debug Registers: }Debug register
s are not managed by a (known) Windows component, therefore, everybody can use it. This counter counts how often debug registers are overwritten by an unknown component (driver or application software like a debugger). While debug registers are temporary 
overwritten, I/O instructions are not catched and are not redirected, therefore, the peripheral will look temporary failing for application to be faked. This applies especially for programming devices.
\par \pard The new driver additionally detects stolen debug registers at every user{\f1 \'de}kernel mode transition (Int2E and SYSENTER), this reduces the gaps of redirection considerable. These detection counts are currently not shown or accessible.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_108}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_109}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 #}{\lang1040  101_110}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Debug}{\b\cf11  Register Assignment: }One debug register (one of four in the system) covers an I/O address space of 4 
contiguous addresses for trapping. Therefore, one debug register is needed for SPP, ECP, and EPP register sets each.
\par Here, the current state is shown whether an address space is covered by a debug register or not.
\par \pard Reasons for unexpected non-coverings are:
\par \pard \fi-283\li567\tx567 {\f1 \'b7}\tab Preassigned (non-empty) debug registers at system startup (sometimes seen at Windows 98)
\par {\f1 \'b7}\tab Used debug registers at driver start (while debugging other programs)
\par {\f1 \'b7}\tab Concurrent (multiple) USB2LPT
\par \pard \fi-284\li567\sa120\tx567 {\f1 \'b7}\tab Concurrent programs with common PORTTRAP.SYS driver component (planned)
\par \pard \sa120 You can avoid the upper two points by checking \'93Enforce allocation\'94 in page \'93Emulation\'94.
\par \pard The default setting \'93LPT enhancement mode = SPP\'94 saves debug registers; then ECP and EPP is not covered.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_106}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 O}{\b\cf11 versize: }
This counter counts I/O instructions with more than 1 Byte data at once, i.e. READ_PORT_USHORT; WRITE_PORT_USHORT; READ_PORT_ULONG; WRITE_PORT_ULONG; in\~ax,dx; out\~dx,ax; in\~eax,dx; out\~
dx,eax, and the similar string functions. A good application does not use such instructions for a parallel port. However, the program {\b\cf12 LabVIEW }is known to make such things.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_116}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_117}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 S}{\b\cf11 et to zero: }Resets the counters left to the button to zero.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_111}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 USB2LPT}{\b\cf11  }{\b\cf11 Special}{\b\cf11 : }Shows up a d
ialog with USB2LPT specific settings.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  101_112}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Firmware}{\b\cf11  }{\b\cf11 Update: }
You can make a firmware update herewith. You need an image file you can download from USB2LPT web site, or you can make your own firmware image.
\par \pard For Low-Speed USB2LPT populated with ATmega8, this direct update is not possible, however, a flag can be set here to activate boot loader after next power cycling to USB2LPT device. This requires new boot loaders from July 2009.
 But for those devices, safest way for firmware upload is using the SPI programming interface.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  102_20}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Dat}{\b\cf11 a P}{\b\cf11 o}{\b\cf11 rt: }If checked
, IN instructions return the last-written OUT byte without latency.
\par \pard \fi-851\li993\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 switched }{\b\cf10 ON}{\b\cf10 \line 
}{\i Except you know your application software requiring }{\i ECP}{\i  }{\i \'96}{\i  }{\i that's }{\i very rare}{\i !}
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  102_21}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Control P}{\b\cf11 ort: }If checked, IN instructio
ns return the last-written OUT byte without latency.
\par \pard \fi-851\li993\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 switched }{\b\cf10 ON}{\b\cf10 \line 
}{\i But some rare }{\i peripheral}{\i  }{\i uses control port pins for data input}{\i .}
\par \pard \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  102_22}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Extra-Ports: }This setting has currently no effect.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  104_100}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  104_101}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 O}{\b\cf11 pen C}{\b\cf11 olle}{\b\cf11 c}{\b\cf11 tor}{\b\cf11 s}{\b\cf11 : }These settings are intended for not fully TTL compatible peripherals.
\par In general, 5\~V TTL inputs are compatible with 3.3\~V CMOS outputs without level converters. However, problems arise with some peripheral that uses 5\~V CMOS gates (especially the CD4000B series) or requires more than 3.3\~
V like blue or white LEDs. Therefore, outputs can be simulated as open-collector with external pull-up resistors to 5\~V.
\par This is not applicable Low-Speed USB2LPT equipped with ATmega8 that run with 5\~V. However, in this case, you can even use open collectors for wired AND connections.
\par \pard \fi-851\li993\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 switched }{\b\cf10 OFF}{\b\cf10 \line 
}{\i Some }{\i older }{\i p}{\i arallel}{\i  }{\i port }{\i really }{\i ha}{\i d}{\i  }{\i o}{\i pen }{\i c}{\i ollectors at }{\i c}{\i 
ontrol }{\i port}{\i , and some newer south bridge chip sets emulate this behaviour too}{\i .}
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  104_102}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Switch O}{\b\cf11 ff P}{\b\cf11 ullups}{\b\cf11 : }
{\i High-Speed: }A single transistor enables externat 5\~V pullup resistors. Switching off preserves power, and weak (about 100 k{\f1 W}) internal 3.3\~V pullups apply.
\par \pard \li284\ri476\sa120\box\brdrs\brdrw15\brsp60 In USB standby mode, USB2LPT switches off pullups automatically, and sets all outputs to high-impedance state to achive less than 500\~\'b5A current consumption independently of connected peripheral.

\par \pard \sa120 {\i Low-Speed: }The weak ATmega-builtin pullup resisors (about 40 k{\f1 W}) are switched off. In this case, inputs are at extremely high-impedance, therefore apply caution!
\par \pard \fi-851\li993\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 switched }{\b\cf10 OFF}{\b\cf10  (i.e. }{\b\cf10 p}{\b\cf10 ullups ON)}{\b\cf10 \line 
}{\i When connecting }{\i 3}{\i .}{\i 3}{\i  }{\i V}{\i  peripherals }{\i that is not 5\~
V tolerant, you may switch off pullups.}
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  104_103}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Dire}{\b\cf11 c}{\b\cf11 t}{\b\cf11  }{\b\cf11 I}{
\b\cf11 /}{\b\cf11 O}{\b\cf11 : }This checkmark converts USB2LPT to a digital interface with 17\'9620 digital input/output lines with individual direction selection which is {\i n}{\i ot}{\i  }compatible to a parallel port.
\par \pard \fi-851\li993\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 switched }{\b\cf10 OFF}{\b\cf10 \line 
}{\i If you plan to program USB2LPT with its}{\i  API, you can set this bit using}{\i  the API too.}
\par \pard \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  104_3}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Set}{\b\cf11  a}{\b\cf11 nd R}{\b\cf11 e-Read}{\b\cf11 : }
Accepts the settings above and {\b\cf12 saves}{\b\cf12  }these {\b\cf12 to non-volatile memory }of USB2LPT device.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  104_4}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Scan for short circuits}{\b\cf11 : }
Executes a self-check of USB2LPT device. Peripherals must be disconnected from USB2LPT device while executing!
\par \pard After the basic scan, a question message occurs to check HIGH levels at all port pins. This checks connections between microcontroller pins and SubD pins.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  104_110}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Seri}{\b\cf11 al N}{\b\cf11 um}{\b\cf11 b}{\b\cf11 
er: }All \'93genuine\'94 USB2LPT have serial numbers, mostly, for tracking faulty devices. Self-made devices should not have serial numbers, so \'93none\'94 is shown for those.
\par \pard {\fs16 There is a backdoor to set the serial number here}{\fs16  }{\fs16 \'96}{\fs16  }{\fs16 you}{\fs16  can read }{\fs16 the sourc}{\fs16 e code }{\fs16 on }{\fs16 how}{\fs16  to do}{\fs16 .}{\fs16 
\par }\page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  104_111}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Firmware}{\b\cf11  }{\b\cf11 Dat}{\b\cf11 e}{\b\cf11 :}{
\b\cf11  }When new enough (since 2005), the flashed firmware has a time stamp for the creation date.
\par \pard \sa120 \page ${\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 $}{\lang1040  Monitor}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_0}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Monitor: }Monitoring and controlling of USB2LPT parallel port.
\par Monitoring is useful to check static levels of port pins.
\par You can exercise {\i all}{\i  }functions of a parallel port (ECP, EPP etc.) and {\i all }USB2LPT-specific extra functions (direction register, Direct I/O features)!
\par \pard \fi-708\li851\tx851 {\b\cf14 Hint:}{\b\cf14 \tab }While using Device Manager, use the context help function, or press {\b\cf10 F1 }on focused dialog control!
\par \pard \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_176}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Byte read }{\b\cf11 from}{\b\cf11  }{\b\cf11 Dat}{\b\cf11 
a Por}{\b\cf11 t}{\b\cf11 : }This hexadecimal byte is read in from the data port. Normally continuously updated.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_117}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Read D}{\b\cf11 at}{\b\cf11 a P}{\b\cf11 ort}{
\b\cf11 : }Initiates a read cycle from LPT base address+0.
\par \pard This button occurs only in LPT port modes {\b\cf10 ECP }and {\b\cf10 Tes}{\b\cf10 t }(the real data port value is hidden by the FIFO). Otherwise, this button is hidden, and this program reads the data port value continuously.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_16}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Bits for D}{\b\cf11 at}{\b\cf11 a Port}{\b\cf11 : }
Display and modify single {\b\cf10 b}{\b\cf10 its }of data port.
\par \pard \fi-1418\li1701\tx1276\tx1702 {\b\cf14 Colors}{\b\cf14 :}{\b\cf14 \tab }{\b\cf14 {\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000033f0000000100080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c0000000000040000002d0100000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf6340803000000000021
08010054000301490b010073000000040000002d01}}\tab Bit = 0
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000000ff0000040000002d01000007000000fc02000000ff00000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000000000000000001400000000}}\tab Bit = 1
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000036000000003000a0000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c0000ff0000040000002d01000007000000fc02000000ff00000000040000002d0101000a000000240303009808a0f698083cf63408a0f608000000fa0200000c000c00000000
00040000002d0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000001400000000}}\tab written 0 but reads 1 (shown only when DirectIO enabled)
\par \pard \fi-1418\li1701\sa120\tx1276\tx1702 \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000036000000003000a0000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c0000ff0000040000002d01000007000000fc02000000ff00000000040000002d0101000a0000002403030034083cf698083cf63408a0f608000000fa0200000c000c00000000
00040000002d0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000001400000000}}\tab written 1 but reads 0 (shown only when DirectIO enabled)
\par \pard \sa120 While hovering a square with mouse, a bubble help with signal name is shown.
\par \pard {\f5\fs32\cf13 7}{\i\cf13  }{\i N}{\i o}{\i  }{\i keyboard}{\i  access}{\i .}{\i 
\par }\page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_160}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Write data port}{\b\cf11 : }Enter data byte (8 bit at once) as 
{\b\cf10 h}{\b\cf10 exade}{\b\cf10 c}{\b\cf10 imal}{\b\cf10  number}{\b\cf10  }or as {\b\cf10 character}{\b\cf10  }with a prepended \'93-\'94 (minus sign). The write access is triggered 0.5 seconds after last input automatically, so 
type fast and don't press any extra key. A beep occurs when an error has occured.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_10}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Level }{\b\cf11 D}{\b\cf11 isplay }{\b\cf11 for }{
\b\cf11 SubD}{\b\cf11  socket}{\b\cf11 : }Display and modify {\b\cf10 TTL l}{\b\cf10 e}{\b\cf10 vels} of SubD pins.
\par \pard \fi-1843\li1985\tqr\tx1843\tx1980 {\b\cf14 F}{\b\cf14 illing }{\b\cf14 c}{\b\cf14 olors}{\b\cf14 :}{\b\cf14 \tab }{\f5 m}{\f5 \tab }LOW level
\par {\f5\cf4 \tab }{\f5\cf4 l}{\f5\cf6 l}{\f5\cf7 l}{\f5\cf4 \tab }HIGH level
\par \pard \fi-1843\li1985\sa120\tqr\tx1843\tx1980 {\f5\cf16 \tab }{\f5\cf16 l}{\f5\cf16 \tab }Unknown level (e.g. data port while ECP), {\fs16 the}{\fs16  USB2LPT}{\fs16  f}{\fs16 irmware }{\fs16 is missing a back door for this}{\fs16 !}
\par \pard \fi-1843\li1985\tqr\tx1843\tx1980 {\b\cf14 Frame}{\b\cf14  }{\b\cf14 c}{\b\cf14 olors}{\b\cf14 :}{\b\cf14 \tab }{\b\f5\cf4 m}{\b\f5\cf4 \tab }Data pin (mostly output)
\par {\b\f5\cf6 \tab }{\b\f5\cf6 m}{\b\f5\cf6 \tab }Status pin (normally input)
\par {\b\f5\cf7 \tab }{\b\f5\cf7 m}{\b\f5\cf7 \tab }Control pin (normally output)
\par \pard \fi-1843\li1985\sa120\tqr\tx1843\tx1980 {\b\f5 \tab }{\b\f5 m}{\b\f5 \tab }Ground (reference level)
\par \pard \sa120 While hovering a pin with mouse, a bubble help with signal name and meaning (contextual to the currently selected LPT port mode) is shown. Inversions are shown in respect to the TTL levels.
\par \pard {\f5\fs32\cf13 7}{\i\cf13  }{\i N}{\i o}{\i  }{\i keyboard}{\i  access}{\i .}{\i 
\par }\page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_177}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Byte read }{\b\cf11 from}{\b\cf11  S}{\b\cf11 tatus}{\b\cf11  P
}{\b\cf11 ort}{\b\cf11 : }This hexadecimal byte is read in from the status port. Continuously updated.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_17}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Bits for }{\b\cf11 Status}{\b\cf11  P}{\b\cf11 ort}{
\b\cf11 : }Display (and modify) single {\b\cf10 b}{\b\cf10 its }of status port.
\par \pard \fi-1418\li1701\tx1276\tx1702 {\b\cf14 Colors}{\b\cf14 :}{\b\cf14 \tab }{\b\cf14 {\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000033f0000000100080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c0000000000040000002d0100000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf6340803000000000021
08010054000301490b010073000000040000002d01}}\tab Bit = 0
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa02000000000000ff000000040000002d01000007000000fc020000ff0000000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf63408030000000000000013023cf63408030000000000000000000000000000000000}}\tab Bit = 1
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000036000000003000a0000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c00ff000000040000002d01000007000000fc020000ff0000000000040000002d0101000a000000240303009808a0f698083cf63408a0f608000000fa0200000c000c00000000
00040000002d0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000001400000000}}\tab written 0 but reads 1 (shown only when DirectIO enabled)
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000036000000003000a0000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c00ff000000040000002d01000007000000fc020000ff0000000000040000002d0101000a0000002403030034083cf698083cf63408a0f608000000fa0200000c000c00000000
00040000002d0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000001400000000}}\tab written 1 but reads 0 (shown only when DirectIO enabled)
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000080808000040000002d01000007000000fc020000808080000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf63408030000000000050000001302a0f634080500000013023cf63408030000000000}}\tab Bit not implemented, reads 0
\par \pard \fi-1418\li1701\sa120\tx1276\tx1702 \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000080000000040000002d01000007000000fc020000800000000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000000000000000001400000000}}\tab Bit not implemented, reads 1
\par \pard \sa120 While hovering a square with mouse, a bubble help with signal name and meaning (contextual to the currently selected LPT port mode) is shown. Inversions are shown in respect to the bit values.
\par \pard \fi-708\li851\tx851 {\b\cf14 Hin}{\b\cf14 t}{\b\cf14 :}{\b\cf14 \tab }Setting a bit is only useful when the corresponding direction register bit is set to {\b\cf10 output}.
\par \pard {\f5\fs32\cf13 7}{\i\cf13  }{\i N}{\i o}{\i  }{\i keyboard}{\i  access}{\i .}{\i 
\par }\page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_161}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Write }{\b\cf11 St}{\b\cf11 atus}{\b\cf11  P}{\b\cf11 ort}{
\b\cf11 : }Enter data byte (8 bit at once) as {\b\cf10 h}{\b\cf10 exade}{\b\cf10 c}{\b\cf10 imal}{\b\cf10  number}. The write access is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra key. 
A beep occurs when an error has occured. {\b\i\cf13 Normally useless because input port}{\b\i\cf13 !}
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_178}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Byte read }{\b\cf11 from}{\b\cf11  }{\b\cf11 Control P}{\b\cf11 
ort}{\b\cf11 : }This hexadecimal byte is read in from the control port. Continuously updated.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_18}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Bits for }{\b\cf11 Control P}{\b\cf11 ort}{\b\cf11 
: }Display and modify single {\b\cf10 b}{\b\cf10 its }of control port.
\par \pard \fi-1418\li1701\tx1276\tx1702 {\b\cf14 Colors}{\b\cf14 :}{\b\cf14 \tab }{\b\cf14 {\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000033f0000000100080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c0000000000040000002d0100000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf6340803000000000021
08010054000301490b010073000000040000002d01}}\tab Bit = 0
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa02000000000000ffff0000040000002d01000007000000fc020000ffff00000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000000000000000000000000000}}\tab Bit = 1
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000036000000003000a0000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c00ffff0000040000002d01000007000000fc020000ffff00000000040000002d0101000a000000240303009808a0f698083cf63408a0f608000000fa0200000c000c00000000
00040000002d0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf63408030000000000ffffffffffffffffffffffffffffffffffffffff}}\tab written 0 but reads 1 (shown only when DirectIO enabled)
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000036000000003000a0000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c00ffff0000040000002d01000007000000fc020000ffff00000000040000002d0101000a0000002403030034083cf698083cf63408a0f608000000fa0200000c000c00000000
00040000002d0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf63408030000000000a0f634080500000013023cf63408030000000000}}\tab written 1 but reads 0 (shown only when DirectIO enabled)
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000080808000040000002d01000007000000fc020000808080000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf63408030000000000050000001302a0f634080500000013023cf63408030000000000}}\tab Bit not implemented, reads 0
\par \pard \fi-1418\li1701\sa120\tx1276\tx1702 \tab {\b\cf14 {\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000080800000040000002d01000007000000fc020000808000000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000000000000000001400000000}}\tab Bit not implemented, reads 1
\par \pard \sa120 While hovering a square with mouse, a bubble help with signal name and meaning (contextual to the currently selected LPT port mode) is shown. Inversions are shown in respect to the bit values.
\par \pard {\f5\fs32\cf13 7}{\i\cf13  }{\i N}{\i o}{\i  }{\i keyboard}{\i  access}{\i .}{\i 
\par }\page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_162}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Write }{\b\cf11 Control P}{\b\cf11 ort}{\b\cf11 : }
Enter data byte (8 bit at once) as {\b\cf10 h}{\b\cf10 exade}{\b\cf10 c}{\b\cf10 imal}{\b\cf10  number}. The write access is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra key. 
A beep occurs when an error has occured.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_168}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Last }{\b\cf11 R}{\b\cf11 ead F}{\b\cf11 IFO}{\b\cf11  B}{
\b\cf11 yte: }Shows the byte, hexadecimal, read out of the FIFO (its port address depends on mode selected).
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_131}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 R}{\b\cf11 ead }{\b\cf11 FIFO}{\b\cf11 : }
This button triggers a FIFO read cycle. The byte shown left to the button is updated, and the FIFO states, {\b\cf10 FIFO }{\b\cf10 full}{\b\cf10  }and {\b\cf10 FIFO }{\b\cf10 empty}, may change.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_122}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_123}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 FIFO}{\b\cf11  A}{\b\cf11 d}{\b\cf11 d}{\b\cf11 ressi}{\b\cf11 ng: }Selects the mode of the next FIFO read or write cycle. (Both modes share one FIFO.)
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_130}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Write }{\b\cf11 FIFO}{\b\cf11  }{\b\cf11 \'96
 or }{\b\cf11 W}{\b\cf11 rite}{\b\cf11  Data U}{\b\cf11 s}{\b\cf11 ing Strobe}{\b\cf11 : }This button triggers a FIFO write cycle. The byte shown right to the button is taken, and the FIFO states, {\b\cf10 FIFO }{\b\cf10 full}{\b\cf10  }and {\b\cf10 FIFO 
}{\b\cf10 empty}, may change. Moreover, for ease of tesing, the byte is auto-incremented {\i afterwards }for the next cycle \'96 don't confuse!
\par \pard If the currently selected LPT mode doesn't have a FIFO, this button triggers a printer-alike data output cycle asserting the {\b\cf12 strobe }signal. So you can easily check devices connected to the USB2LPT device that behave like printers \'96
 for example, real printers or relay cards.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_169}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Byte to }{\b\cf11 O}{\b\cf11 utput to }{\b\cf11 FIFO}{\b\cf11  }
{\b\cf11 \'96 }{\b\cf11 or }{\b\cf11 U}{\b\cf11 sing Strobe}{\b\cf11 : }Enter data byte (8 bit at once) as {\b\cf10 h}{\b\cf10 exade}{\b\cf10 c}{\b\cf10 imal}{\b\cf10  number}{\b\cf10  }or as {\b\cf10 character}{\b\cf10  }with a prepended \'93-
\'94 (minus sign). The FIFO output \'96 or data write access using {\b\cf12 strobe }when currently selected LPT mode doesn't have a FIFO \'96 is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra 
key. A beep occurs when an error has occured.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_186}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 Byte read }{\b\cf11 from}{\b\cf11  }{\b\cf11 ECR}{\b\cf11 : }
This hexadecimal byte is read in from the Extended Control Register (ECR). Continuously updated.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_102}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 ECR}{\b\cf11 : }{\b\cf11 LPT }{\b\cf11 Mod}{\b\cf11 e }{\b\cf11 
Selection}{\b\cf11 : }Show and select the LPT port mode (bits 7:5 of ECR). All 8 Modes are supported, and appearance of this dialog changes accordingly.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_120}}#{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6\lang1040 #}{\lang1040  105_121}}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {
\fs16\up6\lang1040 +}{\lang1040  A}}{\b\cf11 FIFO}{\b\cf11  s}{\b\cf11 tat}{\b\cf11 es}{\b\cf11 : }Shows the two FIFO state bits (bit 1:0) of ECR.
\par \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 #} 105_170}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 +} A}{\b\cf11 Write }{\b\cf11 ECR}{\b\cf11 : }Enter data byte (8 bit at once) as {\b\cf10 h}{\b\cf10 exade}{\b\cf10 c}{
\b\cf10 imal}{\b\cf10  number}. The write access is triggered 0.5 seconds after last input automatically, so type fast and don't press any extra key. A beep occurs when an error has occured.
\par \pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 #} 105_19}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 +} A}{\b\cf11 Direction }{\b\cf11 B}{\b\cf11 its: }Display and modify single {\b\cf10 b}{\b\cf10 its }of 
direction registers of USB2LPT device.
\par \pard \fi-1418\li1701\tqr\tx1560\tx1702 {\b\cf14 Colors}{\b\cf14 :}{\b\cf14 \tab }{\b\cf14 {\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000033f0000000100080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000c000c0000000000040000002d0100000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf6340803000000000021
08010054000301490b010073000000040000002d01}}\tab Port pin = input (0)
\par \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000000ff0000040000002d01000007000000fc02000000ff00000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000000000000000001400000000}}{{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa02000000000000ff000000040000002d01000007000000fc020000ff0000000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf63408030000000000000013023cf63408030000000000000000000000000000000000}}{{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa02000000000000ffff0000040000002d01000007000000fc020000ffff00000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000000000000000000000000000}}\tab Port pin = output (1)
\par \pard \fi-1418\li1701\sa120\tqr\tx1560\tx1702 \tab {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000080808000040000002d01000007000000fc020000808080000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf63408030000000000050000001302a0f634080500000013023cf63408030000000000}} {{\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000080000000040000002d01000007000000fc020000800000000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000000000000000001400000000}}{\b\cf14 {\pict\wmetafile8\picw402\pich402\picwgoal228\pichgoal228 
0100090000035d0000000300080000000000050000000b0235f62d08050000000c0272007200040000000201010008000000fa0200000000000080800000040000002d01000007000000fc020000808000000000040000002d010100070000001b04a0f698083cf6340808000000fa0200000c000c0000000000040000002d
0102000500000014023cf634080500000013023cf69808050000001302a0f69808050000001302a0f634080500000013023cf634080300000000000000000000000000000000000000000000000000001400000000}}\tab Bit not implemented (read 0 or 1)
\par \pard \sa120 While hovering a square with mouse, a bubble help with signal name is shown.
\par The three lower bits of status port are controllable in Direct I/O mode when 3 extra lines are available. Otherwise, these bits read {\b\cf10 1 }(output) for emulating ground pins.
\par \pard {\f5\fs32\cf13 7}{\i\cf13  }{\i N}{\i o}{\i  }{\i keyboard}{\i  access}{\i .}{\i 
\par }\pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 #} 35}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 +} A}{\b\cf11 Firmware}{\b\cf11  }{\b\cf11 Update: }{\b\cf11 Continue}{\b\cf11 ?}{\b\cf11 
\par }{\b\cf13 L}{\b\cf13 ast chance to cancel a cr}{\b\cf13 ucial}{\b\cf13  }{\b\cf13 EEPROM}{\b\cf13  write process}{\b\cf13 !}{\b\cf13 
\par }\pard \fi-850\li993\sa120\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 The}{\b\cf10  }{\b\cf10 f}{\b\cf10 irmware }{\b\cf10 for updating}{\b\cf10  should be newer than }{\b\cf10 the one that }{\b\cf10 currently }{\b\cf10 resides on }{\b\cf10 
the }{\b\cf10 USB2LPT}{\b\cf10  device}{\b\cf10 .}{\b\cf10 
\par }\pard {\i This message occurs only when a }{\i Full-}{\i Speed}{\i  o}{\i r High-Speed}{\i  }{\i USB2LPT}{\i  device was detected}{\i .}{\i 
\par }\pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 #} 40}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 +} A}{\b\cf11 H}{\b\cf11 IGH}{\b\cf11  Level}{\b\cf11 ?}{\b\cf11 
\par }{\i W}{\i hen this message occurs, the scan for short circuits is already passed}{\i .}{\i 
\par }Now you should check whether all 17 digital port pins have strong TTL HIGH level, e.g. with a multimeter, a logic probe or with an LPT checker.
\par This is a check for correct solder joints between PCB and SubD socket.
\par \pard \fi-851\li993\tx993 {\b\cf14 Advise}{\b\cf14 :}{\b\cf14 \tab }{\b\cf10 W}{\b\cf10 hen you don't want to check this, press}{\b\cf10  }{\b\cf10 \'93}{\b\cf10 Yes\'94}{\b\cf10 .}{\b\cf10 
\par }\pard \sa120 \page #{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 #} 41}+{\footnote \pard\plain \s245 \f2\fs20\lang1031 {\fs16\up6 +} A}{\b\cf11 Firmware}{\b\cf11  }{\b\cf11 Update: }{\b\cf11 Set f}{\b\cf11 lag}{\b\cf11 ?}{\b\cf11 
\par }{\b\cf13 L}{\b\cf13 ast chance to cancel a cr}{\b\cf13 ucial}{\b\cf13  }{\b\cf13 EEPROM}{\b\cf13  write process}{\b\cf13 !}{\b\cf13 
\par }The Low-Speed USB2LPT with ATmega8 microcontroller doesn't support firmware updates via Device Manager. On the other hand, the boot loader silently contained in the device is not USB2LPT
 but HID compatible. For doing the real firmware update, you need the {\b bootloadHID.exe}{\b  }flash write program.
\par Pressing {\b\cf10 \'93}{\b\cf10 Yes\'94}{\b\cf10  }you set a flag (42h at EEPROM address 0) for branching to the boot loader when USB2LPT is reconnected next time.
\par Older boot loaders don't support this flag; you activate such boot loaders by connecting {\b\cf10 p}{\b\cf10 in 1 }{\b\cf10 a}{\b\cf10 nd }{\b\cf10 p}{\b\cf10 in 14 }of the SubD socket.
\par Very old Low-Speed USB2LPT of version 1.5 are not shipped with boot loaders. You can safely update firmware 1.6 {\i with }boot loader (if device is equipped with ATmega8), or you cannot use bootloaders (if device is equipped with ATmega48). 
However, a boot loader is {\i not }a must-have. Firmware updating is much safer using the SPI interface of the microcontroller
. To reach the necessary RESET pin, open the device and short-circuit the SJ2 jumper for programming, either with a temporary solder joint or with a screwdriver.
\par \pard {\i This message occurs only when a }{\i Low}{\i -Speed}{\i  }{\i USB2LPT}{\i  device was detected}{\i .}{\i 
\par }\page 
\par 
\par }